Quantum-tunneling field-effect transistor overcomes barriers to integrated-circuit chip development

The next generation of microelectronics relies on radical improvements in transistor switching performance to advance computing power. However, conventional semiconductor technology has hit a physical limit known as the "Boltzmann tyranny," which restricts the energy efficiency of traditional transistors and stalls progress in high-performance electronics.

To address this key bottleneck, a research team at The Hong Kong Polytechnic University (PolyU) has engineered a novel tunneling field-effect transistor (TFET) using two-dimensional (2D) nanomaterials. The breakthrough brings this long-awaited experimental technology closer to commercial reality, offering a fundamental building block for energy-efficient computing and next-generation artificial intelligence (AI) chips.

The research was led by Prof. Jianhua Hao, head of the Department of Physics and Materials, chair professor of Materials Physics and Devices, and associate director of PolyU-Wuhan Technology and Innovation Research Institute at PolyU, in collaboration with researchers from the National University of Singapore, The Hong Kong University of Science and Technology, Peking University, and the Singapore University of Technology and Design.

The findings have been published in Science.

The limit facing conventional transistors

Integrated circuits (ICs), composed of transistors switching between ON and OFF states, form the foundation of modern computing. Conventional complementary metal–oxide–semiconductor field-effect transistors (MOSFETs) rely on thermionic emission of electrical charges over a barrier, driven by a gating voltage with a minimum of 60 millivolts (mV).

However, the notorious Boltzmann limit, or "Boltzmann tyranny," makes subthreshold swing (SS, a measure of switching barrier) values below 60 mV decade⁻¹ at room temperature a physical impossibility for MOSFETs, putting the brakes on further progress in high-performance electronics.

A 2D route around the barrier

Hao said, "The International Roadmap for Devices and Systems (IRDS) has identified TFETs as the most promising alternative to MOSFETs. By replacing thermionic emission with quantum tunneling, our 2D heterostructure transistor breaks through this 60 mV decade⁻¹ boundary, overcoming the standard MOSFET limit. Our TFET paves the way for ultra-low-power, high-performance ICs essential for emerging AI chips and advanced semiconductor applications."

To solve the performance limitations of previous TFET designs, Hao's team created an ultrathin heterostructure of alternating 2D bismuth (Bi) and indium selenide (InSe) layers using pulsed laser deposition (PLD). By exercising precise control over the layer structure at the nanoscale, normally semimetallic bismuth transforms into a semiconductor in 2D form, creating ideal energy band alignment for charge carriers to tunnel efficiently into InSe through a quantum tunneling mechanism.

Strong switching at low voltage

The resulting Bi/InSe TFET achieved SS values well below the 60 mV decade⁻¹ thermionic limit across six orders of magnitude of current switching. Operating at room temperature on standard centimeter-scale silicon substrates, the device required a gate voltage range of only 160 mV—far lower than the 800 mV required by advanced MOSFETs.

Crucially, the device resolved a long-standing challenge in experimental TFETs by delivering a high output current of up to several microamps per micrometer (μA μm⁻¹) alongside an exceptionally high ON/OFF current ratio. High output current is essential for driving multiple downstream logic gates (fan-out), reducing circuit delay and ensuring compatibility with existing IC chips and even generational upgrades.

A scalable path for AI hardware

The study also demonstrates the practical viability of PLD for high-precision, wafer-scale manufacturing of 2D materials appropriate for future transistors with ultra-short channel lengths. Given its seamless integration capability with traditional silicon-based manufacturing processes, this breakthrough provides a scalable roadmap for energy-efficient microchips and specialized hardware powering AI applications.

More information: Zehan Wu et al, Tunnel field-effect transistors exhibiting performance beyond the Boltzmann thermionic limit, Science (2026). DOI: 10.1126/science.adx6059

Provided by Hong Kong Polytechnic University